 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MX23L8051 8M-BIT [8M x 1] CMOS SERIAL MASK-ROM FEATURES GENERAL * 8,338,608 x 1 bit structure * Single Power Supply Operation - 3.0 to 3.6 volt for read operations * Latch-up protected to 100mA from -1V to Vcc +1V PERFORMANCE * High Performance - Fast access time: 20MHz serial clock (50pF + 1TTL Load) * Low Power Consumption - Low active read current: 10mA (typical) at 20MHz - Low standby current: 30uA (CMOS) SOFTWARE FEATURES * Input Data Format - 1-byte Command code, 3-byte address, 1-byte byte address HARDWARE FEATURES * SCLK Input - Serial clock input * SI Input - Serial Data Input * SO Output - Serial Data Output * PACKAGE - 28-pin SOP (330mil) GENERAL DESCRIPTION The MX23L8051 is a CMOS 8,338,608 bit serial Mask ROM, which is configured as 1,048,576 x 8 internally. The MX23L8051 features a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial peripheral interface access to the device is enabled by CS input. The MX23L8051 provide sequential read operation on the whole chip. When the device is not in operation and CS is high, it is put in standby mode and draws less than 30uA DC current. PIN CONFIGURATIONS 28-PIN SOP (330 mil) NC NC NC NC NC NC NC NC NC NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 NC GND VCC NC NC NC SI SO CS SCLK NC NC NC NC PIN DESCRIPTION SYMBOL CS SI SO SCLK VCC GND NC DESCRIPTION Chip Select Serial Data Input Serial Data Output Clock Input + 3.3V Power Supply Ground No Internal Connection P/N: PM0838 MX23L8051 REV. 1.1, JUN. 23, 2003 1 MX23L8051 BLOCK DIAGRAM Address Generator X-Decoder Memory Array (2048 x 4096) Page Buffer Data Register Y-Decoder SI CS Mode Logic Sense Amplifier Output Buffer SO SCLK Clock Generator P/N: PM0838 2 REV. 1.1, JUN. 23, 2003 MX23L8051 COMMAND DEFINITION Command 1st 2nd 3rd 4th 5th 6th 7th 8th 9th Action Read Array 52H AD1 AD2 AD3 BA X X X X n bytes read out until CS goes high (byte) Note: 1.X is dummy cycle and is necessary 2.AD1 to AD3 are address input data 3.BA is byte address 1-byte command code Bit7(MSB) Bit6 3-byte address(0 to 0FFFH) AD1: X X AD2: A16 A15 AD3: X X 1-byte byte address(0 to 7FH) BA: X A6 Bit5 X A14 X A5 Bit4 X A13 X A4 Bit3 X A12 X A3 Bit2 A19 A11 X A2 Bit1 A18 A10 A8 A1 Bit0 A17 A9 A7 A0 P/N: PM0838 3 REV. 1.1, JUN. 23, 2003 MX23L8051 DEVICE OPERATION 1.When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until next CS falling edge. In standby mode, SO pin of this LSI should be High-Z. 2.When correct command is inputted to this LSI, this LSI becomes active mode and keeps the active mode until next CSB rising edge. COMMAND DESCRIPTION (1) Read Array This command is sent with the 4-byte address (command included), and the byte address, followed by four dummy bytes sent to give the device time to stabilize. The device will then send out data starting at the byte address until CS goes high. The clock to clock out the data is supplied by the master serial peripheral interface. (2) Standby Mode When CS is high and there is no operation in progress, the device is put in standby mode. Typical standby current is less than 30uA. DATA SEQUENCE Output data is serially sent out through SO pin, synchronized with the rising edge of SCLK, whereas input data is serially read in through SI pin, synchronized with the rising edge of SCLK. The bit sequence for both input and output data is bit 7 (MSB) first, then bit 6, bit 5, ...., and bit 0.(LSB) ADDRESS SEQUENCE The address assignment is described as follows : BA: Byte address Bit sequence: AD1:First Address Bit sequence: AD2:Second Address Bit sequence: AD3:Thrid Address Bit sequence: X X A16 X A6 X A15 X A5 X A14 X A4 X A13 X A3 X A12 X A2 A19 A11 X A1 A18 A10 A8 A0 A17 A9 A7 P/N: PM0838 4 REV. 1.1, JUN. 23, 2003 MX23L8051 ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS RATING Ambient Operating Temperature Storage Temperature Applied Input Voltage Applied Output Voltage VCC to Ground Potential VALUE 0 C to 70 C -55 C to 125 C -0.5V to 4.6V -0.5V to 4.6V -0.5V to 4.6V 3.During voltage transitions, all pins may overshoot to 4.6V or -0.5V for period up to 20ns. 4.All input and output pins may overshoot to VCC+0.5V while VCC+0.5V is smaller than or equal to 4.6V. 2.Specifications contained within the following tables are subject to change. NOTICE: 1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and functional operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability. Maximum Negative Overshoot Waveform 20ns Maximum Positive Overshoot Waveform 0V -0.5V 4.6V 3.6V 20ns CAPACITANCE TA = 25 C, f = 1.0 MHz SYMBOL CIN COUT PARAMETER Input Capacitance Output Capacitance MIN. TYP MAX. 10 10 UNIT pF pF CONDITIONS VIN = 0V VOUT = 0V P/N: PM0838 5 REV. 1.1, JUN. 23, 2003 MX23L8051 INPUT TEST WAVEFORMS AND MEASURESMENT LEVEL 3.0V 1.5V AC Measurement Level 0V Note:Input pulse rise and fall time are < 10ns OUTPUT LOADING DEVICE UNDER TEST +3.3V CL DIODES=IN3064 OR EQUIVALENT CL=50pF Including jig capacitance P/N: PM0838 6 REV. 1.1, JUN. 23, 2003 MX23L8051 DC CHARACTERISTICS (Temperature = 0 C to 70 C, VCC = 3.0V ~ 3.6V) SYMBOL PARAMETER IIL ILO ISB1 ISB2 ICC1 VIL VIH VOL VOH Input Load Current Output Leakage Current VCC Standby Current (CMOS) VCC Standby Current (TTL) VCC Read Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage 2.4 1 -0.5 2.0 10 30 0.8 VCC+0.5 0.4 mA V V V V IOL = 500uA IOH = -100uA 1 3 mA 1 30 uA 1 10 uA NOTES MIN. 1 TYP MAX. 10 UNITS uA TEST CONDITIONS VCC = VCC Max VIN = VCC or GND VCC = VCC Max VIN = VCC or GND VCC = VCC Max CS = VCC 0.2V VCC = VCC Max CS = VIH f=20MHz NOTES: 1. All currents are in RMS unless otherwise noted. Typical values at VCC = 3.3V, T = 25 C. These currents are valid for all product versions (package and speeds). 2. Typical value is calculated by simulation. P/N: PM0838 7 REV. 1.1, JUN. 23, 2003 MX23L8051 AC CHARACTERISTICS (Temperature = 0 C to 70 C, VCC = 3.0V ~ 3.6V) SYMBOL fSCLK tCYC tSKH tSKL tR tF tCSA tCSB tCSH tDS tDH tAA tDOH tDOZ PARAMETER Clock Frequency Clock Cycle Time Clock High Time Clock Low Time Clock Rise Time Clock Fall Time CS Lead Clock Time CS Lag Clock Time CS High Time SI Setup Time SI Hold Time Access Time SO Hold Time SO Floating Time 5 0 20 50 50 100 5 25 30 50 25 25 6 6 Min. Typ. Max. 20 Units MHz ns ns ns ns ns ns ns ns ns ns ns ns ns Conditions NOTES: 1. Typical value is calculated by simulation. SERIAL DATA INPUT/OUTPUT TIMING tCSB tCSA tCSH CS tCYC tR tF SCLK tSKH tSKL SI tDS BIT 7 tDH BIT 6 BIT 0 SO tAA BIT 7 tDOH BIT 0 tDOZ P/N: PM0838 8 REV. 1.1, JUN. 23, 2003 MX23L8051 STANDBY TIMING WAVEFORM CS SCLK SI SO Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Hi-Z 1st byte When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until next CS falling edge. In standby mode, SO pin of this LSI should be High-Z. While CS=VIH, current=standby current, while CS=VIL and commands are issuing, or commands are invalid, current=5mA(typ.) to 15mA(max.). P/N: PM0838 9 REV. 1.1, JUN. 23, 2003 MX23L8051 READ ARRAY TIMING WAVEFORM CS SCLK SI SO Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Hi-Z 1st byte (52h) 2nd byte (AD1) Hi-Z CS SCLK SI SO 9th byte (Dummy) Hi-Z Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 1st data output byte 2nd data output byte CS SCLK SI SO Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Hi-Z (N-1)th data output byte Nth data output byte NOTES: 1. 1st Byte='52h' 2. 2nd Byte=Address 1(AD1), A17=BIT 0, A18=BIT1, A19=BIT2. 3. 3rd Byte=Address 2(AD2), A9=BIT0, A10=BIT1,......A16=BIT7 4. 4th Byte=Address 3(AD3), A7=BIT0, A8=BIT1 5. 5th Byte=Byte Address(BA), A0=BIT0, A1=BIT1,......A6=BIT6 6. 6th-9th Bytes for SI ==> Dummy Bytes (Don't care) 7. From Byte 10, SO Would Output Array Data P/N: PM0838 10 REV. 1.1, JUN. 23, 2003 MX23L8051 PACKAGE IMFORMATION P/N: PM0838 11 REV. 1.1, JUN. 23, 2003 MX23L8051 REVISION HISTORY Revision No. Description 1.0 1. Low standby current: 8uA(typical) --> 30uA 2. From Advance Information to Formal Version 1.1 1. Modify Package Information Page P1,4,7 P11 Date AUG/26/2002 JUN/23/2003 P/N: PM0838 12 REV. 1.1, JUN. 23, 2003 MX23L8051 MACRONIX INTERNATIONAL CO., LTD. Headquarters: TEL:+886-3-578-6688 FAX:+886-3-563-2888 Europe Office : TEL:+32-2-456-8020 FAX:+32-2-456-8021 Hong Kong Office : TEL:+86-755-834-335-79 FAX:+86-755-834-380-78 Japan Office : Kawasaki Office : TEL:+81-44-246-9100 FAX:+81-44-246-9105 Osaka Office : TEL:+81-6-4807-5460 FAX:+81-6-4807-5461 Singapore Office : TEL:+65-6346-5505 FAX:+65-6348-8096 Taipei Office : TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 MACRONIX AMERICA, INC. TEL:+1-408-262-8887 FAX:+1-408-262-8810 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. |
Price & Availability of MX23L8051
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |